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| MCP6541/1R/1U/2/3/4 Push-Pull Output Sub-Microamp Comparators Features * * * * * * * * * * * Low Quiescent Current: 600 nA/comparator (typ.) Rail-to-Rail Input: VSS - 0.3V to VDD + 0.3V CMOS/TTL-Compatible Output Propagation Delay: 4 s (typ., 100 mV Overdrive) Wide Supply Voltage Range: 1.6V to 5.5V Available in Single, Dual and Quad Single available in SOT-23-5, SC-70-5 * packages Chip Select (CS) with MCP6543 Low Switching Current Internal Hysteresis: 3.3 mV (typ.) Temperature Ranges: - Industrial: -40C to +85C - Extended: -40C to +125C Description The Microchip Technology Inc. MCP6541/2/3/4 family of comparators is offered in single (MCP6541, MCP6541R, MCP6541U), single with Chip Select (CS) (MCP6543), dual (MCP6542) and quad (MCP6544) configurations. The outputs are push-pull (CMOS/TTLcompatible) and are capable of driving heavy DC or capacitive loads. These comparators are optimized for low power, singlesupply operation with greater than rail-to-rail input operation. The push-pull output of the MCP6541/1R/1U/2/3/4 family supports rail-to-rail output swing and interfaces with TTL/CMOS logic. The internal input hysteresis eliminates output switching due to internal input noise voltage, reducing current draw. The output limits supply current surges and dynamic power consumption while switching. This product family operates with a single-supply voltage as low as 1.6V and draws less than 1 A/comparator of quiescent current. The related MCP6546/7/8/9 family of comparators from Microchip has an open-drain output. Used with a pull-up resistor, these devices can be used as level-shifters for any desired voltage up to 10V and in wired-OR logic. * SC-70-5 E-Temp parts not available at this release of the data sheet. MCP6541U SOT-23-5 is E-Temp only. Typical Applications * * * * * * * * Laptop Computers Mobile Phones Metering Systems Hand-held Electronics RC Timers Alarm and Monitoring Circuits Windowed Comparators Multi-vibrators Related Devices * Open-Drain Output: MCP6546/7/8/9 Package Types MCP6541 PDIP, SOIC, MSOP NC VIN- VIN+ VSS 1 2 3 4 + 8 7 6 5 NC VDD OUT NC MCP6541R SOT-23-5 OUT 1 VDD 2 VIN+ 3 5 VSS MCP6542 PDIP, SOIC, MSOP 1 2 3 4 -+ 8 7 +- 6 5 MCP6544 PDIP, SOIC, TSSOP 1 2 -+ +3 4 14 OUTD 13 VIND- 12 VIND+ 11 VSS OUTA VINA- VINA+ 4 VIN- VSS VDD OUTA OUTB VINA- VINB- VINA+ VDD VINB+ MCP6541 SOT-23-5, SC-70-5 OUT 1 VSS 2 VIN+ 3 5 VDD + 4 VIN- MCP6541U SOT-23-5 + VIN- 1 VSS 2 VIN+ 3 5 VDD 4 OUT (c) 2006 Microchip Technology Inc. - + MCP6543 PDIP, SOIC, MSOP NC VIN- VIN+ VSS 1 2 3 4 + 8 7 6 5 CS VDD OUT NC 10 VINC+ VINB+ 5 VINB- 6 - + + - 9 VINC- OUTB 7 8 OUTC DS21696E-page 1 MCP6541/1R/1U/2/3/4 1.0 ELECTRICAL CHARACTERISTICS Notice: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings VDD - VSS .........................................................................7.0V Current at Analog Input Pin (VIN+, VIN-.........................2 mA Analog Input (VIN) ...................... VSS - 1.0V to VDD + 1.0V All other Inputs and Outputs........... VSS - 0.3V to VDD + 0.3V Difference Input voltage ....................................... |VDD - VSS| Output Short-Circuit Current .................................continuous Current at Input Pins ....................................................2 mA Current at Output and Supply Pins ............................30 mA Storage temperature .....................................-65C to +150C Maximum Junction Temperature (TJ) .......................... +150C ESD protection on all pins (HBM;MM) ...................4 kV; 400V See Section 4.1.2 "Input Voltage and Current Limits" DC CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25C,VIN+ = VDD/2, VIN- = VSS, and RL = 100 k to VDD/2 (Refer to Figure 1-3). Parameters Power Supply Supply Voltage Quiescent Current per comparator Input Input Voltage Range Common Mode Rejection Ratio Common Mode Rejection Ratio Common Mode Rejection Ratio Power Supply Rejection Ratio Input Offset Voltage Drift with Temperature Input Hysteresis Voltage Linear Temp. Co. (Note 2) Quadratic Temp. Co. (Note 2) Input Bias Current At Temperature (I-Temp parts) At Temperature (E-Temp parts) Input Offset Current Common Mode Input Impedance Differential Input Impedance Note 1: 2: 3: 4: VCMR CMRR CMRR CMRR PSRR VOS VOS/TA VHYST TC1 TC2 IB IB IB IOS ZCM ZDIFF VSS-0.3 55 50 55 63 -7.0 -- 1.5 -- -- -- -- -- -- -- -- -- 70 65 70 80 1.5 3 3.3 6.7 -0.035 1 25 1200 1 1013||4 1013||2 VDD+0.3 -- -- -- -- +7.0 -- 6.5 -- -- -- 100 5000 -- -- -- V dB dB dB dB mV V/C mV V/C pA pA pA pA ||pF ||pF VDD = 5V, VCM = -0.3V to 5.3V VDD = 5V, VCM = 2.5V to 5.3V VDD = 5V, VCM = -0.3V to 2.5V VCM = VSS VCM = VSS (Note 1) TA = -40C to +125C, VCM = VSS VCM = VSS (Note 1) TA = -40C to +125C, VCM = VSS VCM = VSS TA = +85C, VCM = VSS (Note 3) TA = +125C, VCM = VSS (Note 3) VCM = VSS VDD IQ 1.6 0.3 -- 0.6 5.5 1.0 V A IOUT = 0 Sym Min Typ Max Units Conditions V/C2 TA = -40C to +125C, VCM = VSS The input offset voltage is the center (average) of the input-referred trip points. The input hysteresis is the difference between the input-referred trip points. VHYST at different temperatures is estimated using VHYST (TA) = VHYST + (TA - 25C) TC1 + (TA - 25C)2 TC2. Input bias current at temperature is not tested for SC-70-5 package. Limit the output current to Absolute Maximum Rating of 30 mA. DS21696E-page 2 (c) 2006 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 DC CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25C,VIN+ = VDD/2, VIN- = VSS, and RL = 100 k to VDD/2 (Refer to Figure 1-3). Parameters Push-Pull Output High-Level Output Voltage Low-Level Output Voltage Short-Circuit Current Note 1: 2: 3: 4: VOH VOL ISC ISC VDD-0.2 -- -- -- -- -- -2.5, +1.5 30 -- VSS+0.2 -- -- V V mA mA Sym Min Typ Max Units Conditions IOUT = -2 mA, VDD = 5V IOUT = 2 mA, VDD = 5V VDD = 1.6V (Note 4) VDD = 5.5V (Note 4) The input offset voltage is the center (average) of the input-referred trip points. The input hysteresis is the difference between the input-referred trip points. VHYST at different temperatures is estimated using VHYST (TA) = VHYST + (TA - 25C) TC1 + (TA - 25C)2 TC2. Input bias current at temperature is not tested for SC-70-5 package. Limit the output current to Absolute Maximum Rating of 30 mA. AC CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD/2, Step = 200 mV, Overdrive = 100 mV, and CL = 36 pF (Refer to Figure 1-2 and Figure 1-3). Parameters Rise Time Fall Time Propagation Delay (High-to-Low) Propagation Delay (Low-to-High) Propagation Delay Skew Maximum Toggle Frequency Input Noise Voltage Note 1: Sym tR tF tPHL tPLH tPDS fMAX fMAX Eni Min -- -- -- -- -- -- -- -- Typ 0.85 0.85 4 4 0.2 160 120 200 Max -- -- 8 8 -- -- -- -- Units s s s s s kHz kHz VP-P (Note 1) VDD = 1.6V VDD = 5.5V Conditions 10 Hz to 100 kHz Propagation Delay Skew is defined as: tPDS = tPLH - tPHL. MCP6543 CHIP SELECT (CS) CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD/2, VIN- = VSS, and CL= 36 pF (Refer to Figures 1-1 and 1-3). Parameters CS Low Specifications CS Logic Threshold, Low CS Input Current, Low CS High Specifications CS Logic Threshold, High CS Input Current, High CS Input High, VDD Current CS Input High, GND Current Comparator Output Leakage CS Dynamic Specifications CS Low to Comparator Output Low Turn-on Time CS High to Comparator Output High Z Turn-off Time CS Hysteresis Sym VIL ICSL VIH ICSH IDD ISS IO(LEAK) tON tOFF VCS_HYST Min VSS -- 0.8 VDD -- -- -- -- -- -- -- Typ -- 5.0 -- 1 18 -20 1 2 10 0.6 Max 0.2 VDD -- VDD -- -- -- -- 50 -- -- Units V pA V pA pA pA pA ms s V CS = VDD CS = VDD CS = VDD CS = VSS Conditions VOUT = VDD, CS = VDD CS = 0.2 VDD to VOUT = VDD/2, VIN- = VDD CS = 0.8 VDD to VOUT = VDD/2, VIN- = VDD VDD = 5V (c) 2006 Microchip Technology Inc. DS21696E-page 3 MCP6541/1R/1U/2/3/4 CS tON VOUT ISS ICS Hi-Z -0.6 A (typ.) VIL VIH tOFF Hi-Z -20 pA (typ.) 1 pA (typ.) VOUT VOL VIN- VIN+ = VDD/2 tPLH 100 mV VOH VOL tPHL 100 mV -20 pA (typ.) 1 pA (typ.) FIGURE 1-1: Timing Diagram for the CS Pin on the MCP6543. FIGURE 1-2: Diagram. Propagation Delay Timing DS21696E-page 4 (c) 2006 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V and VSS = GND. Parameters Temperature Ranges Specified Temperature Range Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 5L-SC-70 Thermal Resistance, 5L-SOT-23 Thermal Resistance, 8L-PDIP Thermal Resistance, 8L-SOIC Thermal Resistance, 8L-MSOP Thermal Resistance, 14L-PDIP Thermal Resistance, 14L-SOIC Thermal Resistance, 14L-TSSOP Note: JA JA JA JA JA JA JA JA -- -- -- -- -- -- -- -- 331 256 85 163 206 70 120 100 -- -- -- -- -- -- -- -- C/W C/W C/W C/W C/W C/W C/W C/W TA TA TA -40 -40 -65 -- -- -- +85 +125 +150 C C C Note Sym Min Typ Max Units Conditions The MCP6541/2/3/4 I-Temp parts operate over this extended temperature range, but with reduced performance. In any case, the Junction Temperature (TJ) must not exceed the Absolute Maximum specification of +150C. 1.1 Test Circuit Configuration This test circuit configuration is used to determine the AC and DC specifications. VDD 200 k 200 k MCP654X 200 k 200 k VOUT 36 pF VIN = VSS VSS = 0V FIGURE 1-3: AC and DC Test Circuit for the Push-Pull Output Comparators. (c) 2006 Microchip Technology Inc. DS21696E-page 5 MCP6541/1R/1U/2/3/4 2.0 Note: TYPICAL PERFORMANCE CURVES The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD/2, VIN- = GND, RL = 100 k to VDD/2, and CL = 36 pF. 14% Percentage of Occurrences 12% 10% 8% 6% 4% 2% 0% -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 Input Offset Voltage (mV) 1200 Samples VCM = VSS 18% Percentage of Occurrences 16% 14% 12% 10% 8% 6% 4% 2% 0% 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 5.6 6.0 Input Hysteresis Voltage (mV) 1200 Samples VCM = VSS FIGURE 2-1: VCM = VSS. 16% 14% 12% 10% 8% 6% 4% 2% 0% Input Offset Voltage at FIGURE 2-4: VCM = VSS. Percentage of Occurrences 25% 20% 15% 10% 5% 0% 4.6 5.0 5.4 5.8 VDD = 5.5V Input Hysteresis Voltage at Percentage of Occurrences 1200 Samples VCM = VSS TA= -40C to +125C 596 Samples VCM = VSS TA = -40C to +125C VDD = 1.6V 6.2 6.6 7.0 7.4 7.8 8.2 8.6 9.0 -0.020 0 2 4 6 -8 -6 -4 -2 8 10 12 -14 -12 -10 14 Input Offset Voltage Drift (V/C) Input Hysteresis Voltage - Linear Temp. Co.; TC1 (V/C) FIGURE 2-2: VCM = VSS. Inverting Input, Output Voltage (V) 7 6 5 4 3 2 1 0 -1 0 1 2 Input Offset Voltage Drift at FIGURE 2-5: Input Hysteresis Voltage Linear Temp. Co. (TC1) at VCM = VSS. Percentage of Occurrences 20% 18% 16% 14% 12% 10% 8% 6% 4% 2% 0% 596 Samples VCM = VSS TA = -40C to +125C VDD = 5.5V VDD = 1.6V VDD = 5.5V VOUT -0.060 -0.056 -0.052 -0.048 -0.044 -0.040 -0.036 -0.032 -0.028 -0.024 3 4 5 6 7 Time (1 ms/div) 8 9 10 Input Hysteresis Voltage - Quadratic Temp. Co.; TC2 (V/C2) FIGURE 2-3: The MCP6541/1R/1U/2/3/4 comparators show no phase reversal. FIGURE 2-6: Input Hysteresis Voltage Quadratic Temp. Co. (TC2) at VCM = VSS. DS21696E-page 6 (c) 2006 Microchip Technology Inc. -0.016 VIN- 9.4 MCP6541/1R/1U/2/3/4 Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = 25C, VIN+ = VDD/2, VIN- = GND, RL = 100 k to VDD/2, and CL = 36 pF. 1.0 0.8 0.6 0.4 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 Input Offset Voltage (mV) VCM = VSS VDD = 1.6V VDD = 5.5V 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 Input Hysteresis Voltage (mV) VCM = VSS VDD = 1.6V VDD = 5.5V -50 -25 0 25 50 75 100 Ambient Temperature (C) 125 -50 -25 0 25 50 75 Ambient Temperature (C) 100 125 FIGURE 2-7: Input Offset Voltage vs. Ambient Temperature at VCM = VSS. 2.0 Input Offset Voltage (mV) 1.5 1.0 0.5 0.0 -0.5 -1.0 -1.5 -2.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 -0.4 -0.2 Common Mode Input Voltage (V) TA = +125C TA = +125C TA = +85C TA = +25C TA = -40C VDD = 1.6V FIGURE 2-10: Input Hysteresis Voltage vs. Ambient Temperature at VCM = VSS. Input Hysteresis Voltage (mV) 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 5.5 -0.4 -0.2 Common Mode Input Voltage (V) 2.0 6.0 TA = -40C VDD = 1.6V TA = +125C TA = +85C TA = +25C FIGURE 2-8: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 1.6V. 2.0 Input Offset Voltage (mV) 1.5 1.0 0.5 0.0 -0.5 -1.0 -1.5 -2.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 -0.5 Common Mode Input Voltage (V) TA = +85C TA = +125C VDD = 5.5V TA = -40C TA = +25C FIGURE 2-11: Input Hysteresis Voltage vs. Common Mode Input Voltage at VDD = 1.6V. Input Hysteresis Voltage (mV) 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 -0.5 Common Mode Input Voltage (V) 5.0 VDD = 5.5V TA = +125C TA = +85C TA = +25C TA = -40C FIGURE 2-9: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 5.5V. FIGURE 2-12: Input Hysteresis Voltage vs. Common Mode Input Voltage at VDD = 5.5V. (c) 2006 Microchip Technology Inc. DS21696E-page 7 MCP6541/1R/1U/2/3/4 Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = 25C, VIN+ = VDD/2, VIN- = GND, RL = 100 k to VDD/2, and CL = 36 pF. Input Bias, Offset Currents (A) 90 85 CMRR, PSRR (dB) 80 75 70 65 60 55 -50 -25 0 25 50 75 Ambient Temperature (C) 100 125 PSRR, VIN+ = VSS, VDD = 1.6V to 5.5V Input Referred 10000 10n IB, TA = +125C 1000 1n 100p 100 10p 10 IOS, TA = +125C 1p 1 IOS, TA = +85C IB, TA = +85C VDD = 5.5V CMRR, VIN+ = -0.3 to 5.3V, VDD = 5.0V 100f 0.1 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Common Mode Input Voltage (V) FIGURE 2-13: Temperature. 1000 100 10 1 0.1 55 65 CMRR,PSRR vs. Ambient FIGURE 2-16: Input Bias Current, Input Offset Current vs. Common Mode Input Voltage. 0.7 Quiescent Current per Comparator (A) 0.6 0.5 0.4 0.3 0.2 0.1 0.0 TA = +125C TA = +85C TA = +25C TA = -40C 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Power Supply Voltage (V) Input Bias, Offset Currents (pA) VDD = 5.5V VCM = VDD IB | IOS | 75 85 95 105 115 125 Ambient Temperature (C) FIGURE 2-14: Input Bias Current, Input Offset Current vs. Ambient Temperature. 0.7 Quiescent Current per comparator (A) 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 Common Mode Input Voltage (V) 1.6 Sweep VIN+, VIN- = VDD/2 Sweep VIN-, VIN+ = VDD/2 VDD = 1.6V FIGURE 2-17: Quiescent Current vs. Power Supply Voltage. 0.7 Quiescent Current per Comparator (A) 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Common Mode Input Voltage (V) Sweep VIN+, VIN- = VDD/2 Sweep VIN-, VIN+ = VDD/2 VDD = 5.5V FIGURE 2-15: Quiescent Current vs. Common Mode Input Voltage at VDD = 1.6V. FIGURE 2-18: Quiescent Current vs. Common Mode Input Voltage at VDD = 5.5V. DS21696E-page 8 (c) 2006 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = 25C, VIN+ = VDD/2, VIN- = GND, RL = 100 k to VDD/2, and CL = 36 pF. Output Short Circuit Current Magnitude (mA) 10 Supply Current (A) 35 30 25 20 15 10 5 0 0.1 1 10 Toggle Frequency (kHz) 100 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Power Supply Voltage (V) TA = -40C TA = +25C TA = +85C TA = +125C 100 mV Overdrive VCM = VDD/2 RL = infinity 1 VDD = 5.5V VDD = 1.6V 0.1 FIGURE 2-19: Frequency. Output Voltage Headroom (V) 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0.0 0.5 VOL-VSS: TA = +125C TA = +85C TA = +25C TA = -40C Supply Current vs. Toggle FIGURE 2-22: Output Short Circuit Current Magnitude vs. Power Supply Voltage. 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0 Output Voltage Headroom (V) VOL - VSS: TA = +125C TA = +85C TA = +25C TA = -40C VDD = 1.6V VDD-VOH: TA = +125C TA = +85C TA = +25C TA = -40C 1.0 1.5 2.0 Output Current (mA) 2.5 3.0 VDD = 5.5V 5 10 15 Output Current (mA) VDD - VOH: TA = +125C TA = +85C TA = +25C TA = -40C 20 25 FIGURE 2-20: Output Voltage Headroom vs. Output Current at VDD = 1.6V. Percentage of Occurrences 45% 40% 35% 30% 25% 20% 15% 10% 5% 0% 0 1 2 3 4 5 6 7 8 High-to-Low Propagation Delay (s) VDD = 1.6V VDD = 5.5V 600 Samples 100 mV Overdrive VCM = VDD/2 FIGURE 2-23: Output Voltage Headroom vs. Output Current at VDD = 5.5V. 45% Percentage of Occurrences 40% 35% 30% 25% 20% 15% 10% 5% 0% 0 1 2 3 4 5 6 7 8 Low-to-High Propagation Delay (s) VDD = 1.6V VDD = 5.5V 600 Samples 100 mV Overdrive VCM = VDD/2 FIGURE 2-21: Delay. High-to-Low Propagation FIGURE 2-24: Delay. Low-to-High Propagation (c) 2006 Microchip Technology Inc. DS21696E-page 9 MCP6541/1R/1U/2/3/4 Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = 25C, VIN+ = VDD/2, VIN- = GND, RL = 100 k to VDD/2, and CL = 36 pF. 45% 40% 35% 30% 25% 20% 15% 10% 5% 0% -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 Propagation Delay Skew (s) VDD = 5.5V VDD = 1.6V Percentage of Occurrences Propagation Delay (s) 600 Samples 100 mV Overdrive VCM = VDD/2 8 7 6 5 4 3 2 1 0 100 mV Overdrive VCM = VDD/2 tPLH @ VDD = 5.5V tPHL @ VDD = 5.5V tPLH @ VDD = 1.6V tPHL @ VDD = 1.6V -50 -25 0 25 50 75 Ambient Temperature (C) 100 125 FIGURE 2-25: Propagation Delay Skew. FIGURE 2-28: Propagation Delay vs. Ambient Temperature. 100 Propagation Delay (s) 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 VCM = VDD/2 tPLH @ 10 mV Overdrive tPHL @ 10 mV Overdrive tPLH @ 100 mV Overdrive tPHL @ 100 mV Overdrive 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Power Supply Voltage (V) 5.0 5.5 Propagation Delay (s) VCM = VDD/2 tPHL @ VDD = 5.5V tPLH @ VDD = 1.6V tPHL @ VDD = 1.6V 10 tPLH @ VDD = 5.5V 1 1 10 100 Input Overdrive (mV) 1000 FIGURE 2-26: Propagation Delay vs. Power Supply Voltage. 8 Propagation Delay (s) 7 6 5 4 3 2 1 0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 Common Mode Input Voltage (V) 1.6 tPLH tPHL VDD = 1.6V 100 mV Overdrive FIGURE 2-29: Overdrive. 8 Propagation Delay (s) 7 6 5 4 3 2 1 0 Propagation Delay vs. Input VDD = 5.5V 100 mV Overdrive tPHL tPLH 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Common Mode Input Voltage (V) FIGURE 2-27: Propagation Delay vs. Common Mode Input Voltage at VDD = 1.6V. FIGURE 2-30: Propagation Delay vs. Common Mode Input Voltage at VDD = 5.5V. DS21696E-page 10 (c) 2006 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = 25C, VIN+ = VDD/2, VIN- = GND, RL = 100 k to VDD/2, and CL = 36 pF. 50 45 40 35 30 25 20 15 10 5 0 0 100 mV Overdrive VCM = VDD/2 tPHL @ VDD = 1.6V tPLH @ VDD = 1.6V tPHL @ VDD = 5.5V tPLH @ VDD = 5.5V 10 20 30 40 50 60 70 Load Capacitance (nF) 80 90 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -0.5 0 1 2 Chip Select, Output Voltage (V) VDD = 5.5V Propagation Delay (s) VOUT CS 3 4 5 6 Time (ms) 7 8 9 10 FIGURE 2-31: Capacitance. 1.E-03 1m Supply Current per Comparator (A) 1.E-04 100 10 1.E-05 1 1.E-06 100n 1.E-07 10n 1.E-08 1n 1.E-09 100p 1.E-10 Propagation Delay vs. Load FIGURE 2-34: Chip Select (CS) Step Response (MCP6543 only). 1.E-03 1m Supply Current per Comparator (A) Comparator Turns On Comparator Shuts Off Comparator Turns On Comparator Shuts Off 100 1.E-04 10 1.E-05 1 1.E-06 100n 1.E-07 10n 1.E-08 1n 1.E-09 100p 1.E-10 CS Hysteresis CS High-to-Low CS Low-to-High CS Hysteresis CS Low-to-High CS High-to-Low VDD = 1.6V 10p 1.E-11 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VDD = 5.5V 10p 1.E-11 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Chip Select (CS) Voltage (V) Chip Select (CS) Voltage (V) FIGURE 2-32: Supply Current (shoot through current) vs. Chip Select (CS) Voltage at VDD = 1.6V (MCP6543 only). Output Voltage, Chip Select Voltage (V), 30 25 Supply Current (A) 20 15 10 5 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Time (1 ms/div) Charging output capacitance VDD = 1.6V Start-up IDD VOUT CS 1.6 0.0 -1.6 -3.2 -4.9 -6.5 -8.1 FIGURE 2-35: Supply Current (shoot through current) vs. Chip Select (CS) Voltage at VDD = 5.5V (MCP6543 only). 200 180 160 140 120 100 80 60 40 20 0 6 3 0 -3 -6 -9 -12 -15 -18 -21 -24 3.5 Output Voltage, Chip Select Voltage (V) VOUT CS Start-up IDD Supply Current per Comparator (A) VDD = 5.5V Charging output capacitance 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Time (0.5 ms/div) FIGURE 2-33: Supply Current (charging current) vs. Chip Select (CS) pulse at VDD = 1.6V (MCP6543 only). FIGURE 2-36: Supply Current (charging current) vs. Chip Select (CS) pulse at VDD = 5.5V (MCP6543 only). (c) 2006 Microchip Technology Inc. DS21696E-page 11 MCP6541/1R/1U/2/3/4 Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = 25C, VIN+ = VDD/2, VIN- = GND, RL = 100 k to VDD/2, and CL = 36 pF. 1.E-02 10m 1.E-03 1m 1.E-04 100 1.E-05 10 1 1.E-06 100n 1.E-07 10n 1.E-08 1n 1.E-09 100p 1.E-10 10p 1.E-11 1p 1.E-12 Input Current Magnitude (A) +125C +85C +25C -40C -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 Input Voltage (V) FIGURE 2-37: Voltage Input Bias Current vs. Input DS21696E-page 12 (c) 2006 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 3.0 PIN DESCRIPTIONS Descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE MCP6541R MCP6541U MCP6542 MCP6543 MCP6544 MCP6541 MCP6541 (PDIP, (SOT-23-5, SOIC, SC-70-5) MSOP) Symbol Description 6 2 3 7 -- -- -- -- -- -- 4 -- -- -- -- 1, 5, 8 1 4 3 5 -- -- -- -- -- -- 2 -- -- -- -- -- 1 4 3 2 -- -- -- -- -- -- 5 -- -- -- -- -- 4 1 3 5 -- -- -- -- -- -- 2 -- -- -- -- -- 1 2 3 8 5 6 7 -- -- -- 4 -- -- -- -- -- 6 2 3 7 -- -- -- -- -- -- 4 -- -- -- 8 1, 5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 -- -- OUT, OUTA Digital Output (comparator A) VIN-, VINA- Inverting Input (comparator A) VIN+, VINA+ Non-inverting Input (comparator A) VDD VINB+ VINB- OUTB OUTC VINC- VINC+ VSS VIND+ VIND- OUTD CS NC Positive Power Supply Non-inverting Input (comparator B) Inverting Input (comparator B) Digital Output (comparator B) Digital Output (comparator C) Inverting Input (comparator C) Non-inverting Input (comparator C) Negative Power Supply Non-inverting Input (comparator D) Inverting Input (comparator D) Digital Output (comparator D) Chip Select No Internal Connection 3.1 Analog Inputs 3.4 Power Supply (VSS and VDD) The comparator non-inverting and inverting inputs are high-impedance CMOS inputs with low bias currents. 3.2 CS Digital Input The positive power supply pin (VDD) is 1.6V to 5.5V higher than the negative power supply pin (VSS). For normal operation, the other pins are at voltages between VSS and VDD. Typically, these parts are used in a single (positive) supply configuration. In this case, VSS is connected to ground and VDD is connected to the supply. VDD will need a local bypass capacitor (typically 0.01 F to 0.1 F) within 2 mm of the VDD pin. These can share a bulk capacitor with nearby analog parts (within 100 mm), but it is not required. This is a CMOS, Schmitt-triggered input that places the part into a low power mode of operation. 3.3 Digital Outputs The comparator outputs are CMOS, push-pull digital outputs. They are designed to be compatible with CMOS and TTL logic and are capable of driving heavy DC or capacitive loads. (c) 2006 Microchip Technology Inc. DS21696E-page 13 MCP6541/1R/1U/2/3/4 4.0 APPLICATIONS INFORMATION The MCP6541/2/3/4 family of push-pull output comparators are fabricated on Microchip's state-of-the-art CMOS process. They are suitable for a wide range of applications requiring very low power consumption. the resistors R1 and R2 limit the possible current drawn out of the input pin. Diodes D1 and D2 prevent the input pin (VIN+ and VIN-) from going too far above VDD. When implemented as shown, resistors R1 and R2 also limit the current through D1 and D2. VDD D1 V1 R1 D2 V2 R2 R1 R2 R3 4.1 4.1.1 Comparator Inputs PHASE REVERSAL + The MCP6541/1R/1U/2/3/4 comparator family uses CMOS transistors at the input. They are designed to prevent phase inversion when the input pins exceed the supply voltages. Figure 2-3 shows an input voltage exceeding both supplies with no resulting phase inversion. MCP6G0X - VOUT 4.1.2 INPUT VOLTAGE AND CURRENT LIMITS The ESD protection on the inputs can be depicted as shown in Figure 4-1. This structure was chosen to protect the input transistors, and to minimize input bias current (IB). The input ESD diodes clamp the inputs when they try to go more than one diode drop below VSS. They also clamp any voltages that go too far above VDD; their breakdown voltage is high enough to allow normal operation, and low enough to bypass ESD events within the specified limits. Bond Pad VSS - (minimum expected V1) 2 mA VSS - (minimum expected V2) 2 mA FIGURE 4-2: Protecting the Analog Inputs. VDD It is also possible to connect the diodes to the left of the resistors R1 and R2. In this case, the currents through the diodes D1 and D2 need to be limited by some other mechanism. The resistor then serves as in-rush current limiter; the DC current into the input pins (VIN+ and VIN-) should be very small. A significant amount of current can flow out of the inputs when the common mode voltage (VCM) is below ground (VSS); see Figure 2-37. Applications that are high impedance may need to limit the useable voltage range. VIN+ Bond Pad Input Stage Bond Pad VIN- 4.1.3 VSS Bond Pad NORMAL OPERATION FIGURE 4-1: Structures. Simplified Analog Input ESD In order to prevent damage and/or improper operation of these amplifiers, the circuits they are in must limit the currents (and voltages) at the VIN+ and VIN- pins (see Absolute Maximum Ratings at the beginning of Section 1.0 "Electrical Characteristics"). Figure 4-3 shows the recommended approach to protecting these inputs. The internal ESD diodes prevent the input pins (VIN+ and VIN-) from going too far below ground, and The input stage of this family of devices uses two differential input stages in parallel: one operates at low input voltages and the other at high input voltages. With this topology, the input voltage is 0.3V above VDD and 0.3V below VSS. Therefore, the input offset voltage is measured at both VSS - 0.3V and VDD + 0.3V to ensure proper operation. The MCP6541/1R/1U/2/3/4 family has internally-set hysteresis that is small enough to maintain input offset accuracy (<7 mV) and large enough to eliminate output chattering caused by the comparator's own input noise voltage (200 Vp-p). Figure 4-3 depicts this behavior. DS21696E-page 14 (c) 2006 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 4.4 8 7 6 5 4 3 2 1 0 -1 -2 -3 VDD = 5.0V VIN- VOUT 25 20 15 10 5 0 -5 -10 -15 -20 -25 -30 Input Voltage (10 mV/div) Externally Set Hysteresis Greater flexibility in selecting hysteresis (or input trip points) is achieved by using external resistors. Input offset voltage (VOS) is the center (average) of the (input-referred) low-high and high-low trip points. Input hysteresis voltage (VHYST) is the difference between the same trip points. Hysteresis reduces output chattering when one input is slowly moving past the other and thus reduces dynamic supply current. It also helps in systems where it is best not to cycle between states too frequently (e.g., air conditioner thermostatic control). Output Voltage (V) Hysteresis Time (100 ms/div) FIGURE 4-3: The MCP6541/2/3/4 comparators' internal hysteresis eliminates output chatter caused by input noise voltage. 4.4.1 NON-INVERTING CIRCUIT 4.2 Push-Pull Output Figure 4-4 shows a non-inverting circuit for singlesupply applications using just two resistors. The resulting hysteresis diagram is shown in Figure 4-5. VDD VREF MCP654X + VIN R1 RF VOUT The push-pull output is designed to be compatible with CMOS and TTL logic, while the output transistors are configured to give rail-to-rail output performance. They are driven with circuitry that minimizes any switching current (shoot-through current from supply-to-supply) when the output is transitioned from high-to-low, or from low-to-high (see Figures 2-15, 2-18, 2-32 through 2-36 for more information). 4.3 MCP6543 Chip Select (CS) The MCP6543 is a single comparator with Chip Select (CS). When CS is pulled high, the total current consumption drops to 20 pA (typ.); 1 pA (typ.) flows through the CS pin, 1 pA (typ.) flows through the output pin and 18 pA (typ.) flows through the VDD pin, as shown in Figure 1-1. When this happens, the comparator output is put into a high-impedance state. By pulling CS low, the comparator is enabled. If the CS pin is left floating, the comparator will not operate properly. Figure 1-1 shows the output voltage and supply current response to a CS pulse. The internal CS circuitry is designed to minimize glitches when cycling the CS pin. This helps conserve power, which is especially important in battery-powered applications. FIGURE 4-4: Non-inverting circuit with hysteresis for single-supply. VOUT VDD VOH High-to-Low VOL VSS VSS Low-to-High VIN VTHL VTLH VDD FIGURE 4-5: Hysteresis Diagram for the Non-Inverting Circuit. The trip points for Figures 4-4 and 4-5 are: EQUATION 4-1: R1 R 1 V TLH = V REF 1 + ------ - V OL ------ RF R F R1 R1 V THL = V REF 1 + ------ - V OH ------ RF R F VTLH = trip voltage from low to high VTHL = trip voltage from high to low (c) 2006 Microchip Technology Inc. DS21696E-page 15 MCP6541/1R/1U/2/3/4 4.4.2 INVERTING CIRCUIT Where: R2 R3 R 23 = -----------------R2 + R3 R3 V 23 = ------------------ x V DD R2 + R3 VOUT Using this simplified circuit, the trip voltage can be calculated using the following equation: Figure 4-6 shows an inverting circuit for single-supply using three resistors. The resulting hysteresis diagram is shown in Figure 4-7. VDD VIN VDD R2 RF MCP654X EQUATION 4-2: RF R 23 V THL = V OH ---------------------- + V 23 --------------------- R 23 + R F R 23 + R F RF R 23 V TLH = V OL ---------------------- + V 23 --------------------- R 23 + R F R 23 + R F R3 FIGURE 4-6: Hysteresis. VOUT VDD VOH Low-to-High VOL VSS VSS Inverting Circuit With VTLH = trip voltage from low to high VTHL = trip voltage from high to low Figure 2-20 and Figure 2-23 can be used to determine typical values for VOH and VOL. High-to-Low VIN 4.5 Bypass Capacitors VTLH VTHL VDD FIGURE 4-7: Inverting Circuit. Hysteresis Diagram for the With this family of comparators, the power supply pin (VDD for single supply) should have a local bypass capacitor (i.e., 0.01 F to 0.1 F) within 2 mm for good edge rate performance. 4.6 Capacitive Loads In order to determine the trip voltages (VTHL and VTLH) for the circuit shown in Figure 4-6, R2 and R3 can be simplified to the Thevenin equivalent circuit with respect to VDD, as shown in Figure 4-8. VDD MCP654X + VSS V23 R23 RF VOUT Reasonable capacitive loads (e.g., logic gates) have little impact on propagation delay (see Figure 2-31). The supply current increases with increasing toggle frequency (Figure 2-19), especially with higher capacitive loads. 4.7 Battery Life In order to maximize battery life in portable applications, use large resistors and small capacitive loads. Avoid toggling the output more than necessary. Do not use Chip Select (CS) frequently to conserve start-up power. Capacitive loads will draw additional power at start-up. FIGURE 4-8: Thevenin Equivalent Circuit. DS21696E-page 16 (c) 2006 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 4.8 PCB Surface Leakage 4.9 Unused Comparators In applications where low input bias current is critical, PCB (Printed Circuit Board) surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity conditions, a typical resistance between nearby traces is 1012. A 5V difference would cause 5 pA of current to flow. This is greater than the MCP6541/1R/1U/2/3/4 family's bias current at 25C (1 pA, typ.). The easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 4-9. VINVIN+ VSS An unused amplifier in a quad package (MCP6544) should be configured as shown in Figure 4-10. This circuit prevents the output from toggling and causing crosstalk. It uses the minimum number of components and draws minimal current (see Figure 2-15 and Figure 2-18). 1/4 MCP6544 VDD - + FIGURE 4-10: Guard Ring Unused Comparators. FIGURE 4-9: Example Guard Ring Layout for Inverting Circuit. 1. Inverting Configuration (Figures 4-6 and 4-9): a. Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the comparator (e.g., VDD/2 or ground). b. Connect the inverting pin (VIN-) to the input pad without touching the guard ring. Non-inverting Configuration (Figure 4-4): a. Connect the non-inverting pin (VIN+) to the input pad without touching the guard ring. b. Connect the guard ring to the inverting input pin (VIN-). 2. (c) 2006 Microchip Technology Inc. DS21696E-page 17 MCP6541/1R/1U/2/3/4 4.10 4.10.1 Typical Applications PRECISE COMPARATOR 4.10.3 BISTABLE MULTI-VIBRATOR Some applications require higher DC precision. An easy way to solve this problem is to use an amplifier (such as the MCP6041) to gain-up the input signal before it reaches the comparator. Figure 4-11 shows an example of this approach. VDD VREF MCP6041 VDD VIN R1 R2 VREF MCP654X VOUT A simple bistable multi-vibrator design is shown in Figure 4-13. VREF needs to be between the power supplies (VSS = GND and VDD) to achieve oscillation. The output duty cycle changes with VREF. R1 VREF VDD MCP6541 VOUT R2 C1 R3 FIGURE 4-13: Bistable Multi-vibrator. FIGURE 4-11: Comparator. 4.10.2 Precise Inverting WINDOWED COMPARATOR Figure 4-12 shows one approach to designing a windowed comparator. The AND gate produces a logic `1' when the input voltage is between VRB and VRT (where VRT > VRB). VRT 1/2 MCP6542 VIN VRB 1/2 MCP6542 FIGURE 4-12: Windowed Comparator. DS21696E-page 18 (c) 2006 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 5.0 5.1 PACKAGING INFORMATION Package Marking Information 5-Lead SC-70 (MCP6541) Device I-Temp Code ABNN E-Temp Code Note 2 Example: XXNN Front) YWW (Back) MCP6541U Note 1: 2: AB25 Front) 636 (Back) I-Temp parts prior to March 2005 are marked "ABN" SC-70-5 E-Temp parts not available at this release of this data sheet. 5-Lead SOT-23 (MCP6541, MCP6541R, MCP6541U) Device I-Temp Code ABNN AGNN -- E-Temp Code GTNN GUNN ATNN Example: XXNN 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW MCP6541 MCP6541R MCP6541U AB25 Example: Note: Applies to 5-Lead SOT-23 MCP6541 I/P256 0636 OR MCP6541 e3 E/P^^256 0636 8-Lead SOIC (150 mil) XXXXXXXX XXXXYYWW NNN Example: MCP6542 I/SN0636 256 MCP6541E SN^^0636 e3 256 OR 8-Lead MSOP XXXXXX YWWNNN Example: 6543I 636256 Legend: XX...X Y YY WW NNN e3 * Note: Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. (c) 2006 Microchip Technology Inc. DS21696E-page 19 MCP6541/1R/1U/2/3/4 Package Marking Information (Continued) 14-Lead PDIP (300 mil) (MCP6544) Example: XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN MCP6544-I/P XXXXXXXXXXXXXX 0636256 OR MCP6544E/P e3 0636256 OR MCP6544 I/P^^ e3 0636256 14-Lead SOIC (150 mil) (MCP6544) Example: XXXXXXXXXX XXXXXXXXXX YYWWNNN MCP6544ISL XXXXXXXXXX 0636256 OR MCP6544 e3 E/SL^^ 0636256 14-Lead TSSOP (MCP6544) Example: XXXXXXXX YYWW NNN MCP6544I 0636 256 DS21696E-page 20 (c) 2006 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 5-Lead Plastic Small Outline Transistor (LT) (SC-70) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E E1 D p B n 1 Q1 c A2 A L Units Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Top of Molded Pkg to Lead Shoulder Lead Thickness Lead Width * Controlling Parameter Notes: n p A A2 A1 E E1 D L Q1 c B MIN INCHES NOM 5 .026 (BSC) .031 .031 .000 .071 .045 .071 .004 .004 .004 .006 A1 MILLIMETERS* MAX MIN NOM 5 0.65 (BSC) .043 .039 .004 .094 .053 .087 .012 .016 .007 .012 0.80 0.80 0.00 1.80 1.15 1.80 0.10 0.10 0.10 0.15 1.10 1.00 0.10 2.40 1.35 2.20 0.30 0.40 0.18 0.30 MAX Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side. BSC: Basic Dimension. Theoretically exact value shown without tolerances. See ASME Y14.5M JEITA (EIAJ) Standard: SC-70 Drawing No. C04-061 Revised 07-19-05 (c) 2006 Microchip Technology Inc. DS21696E-page 21 MCP6541/1R/1U/2/3/4 5-Lead Plastic Small Outline Transistor (OT) (SOT23) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E E1 p B p1 D n 1 c A A2 Units Dimension Limits Number of Pins Pitch Outside lead pitch (basic) Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom n p p1 A A2 A1 E E1 D L f c B a b L A1 INCHES* MIN NOM 5 .038 .075 .035 .035 .000 .102 .059 .110 .014 0 .004 .014 0 0 .006 .017 5 5 .046 .043 .003 .110 .064 .116 .018 5 .057 .051 .006 .118 .069 .122 .022 10 .008 .020 10 10 0.35 0.90 0.90 0.00 2.60 1.50 2.80 0.35 MAX MIN MILLIMETERS NOM 5 0.95 1.90 1.18 1.10 0.08 2.80 1.63 2.95 0.45 0 0.09 0 0 0.15 0.43 5 5 5 1.45 1.30 0.15 3.00 1.75 3.10 0.55 10 0.20 0.50 10 10 MAX * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side. EIAJ Equivalent: SC-74A Revised 09-12-05 Drawing No. C04-091 DS21696E-page 22 (c) 2006 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 8-Lead Plastic Dual In-line (P) - 300 mil (PDIP) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E1 D 2 n 1 E A A2 c L A1 eB B1 p B MAX Number of Pins Pitch Top to Seating Plane A .140 .170 4.32 Molded Package Thickness A2 .115 .145 3.68 Base to Seating Plane .015 A1 Shoulder to Shoulder Width E .300 .313 .325 8.26 Molded Package Width E1 .240 .250 .260 6.60 Overall Length D .360 .373 .385 9.78 Tip to Seating Plane L .125 .130 .135 3.43 c Lead Thickness .008 .012 .015 0.38 Upper Lead Width B1 .045 .058 .070 1.78 Lower Lead Width B .014 .018 .022 0.56 eB Overall Row Spacing .310 .370 .430 10.92 Mold Draft Angle Top 5 10 15 15 Mold Draft Angle Bottom 5 10 15 15 * Controlling Parameter Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018 Units Dimension Limits n p MIN INCHES* NOM 8 .100 .155 .130 MAX MIN MILLIMETERS NOM 8 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10 (c) 2006 Microchip Technology Inc. DS21696E-page 23 MCP6541/1R/1U/2/3/4 8-Lead Plastic Small Outline (SN) - Narrow, 150 mil (SOIC) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E E1 p D 2 B n 1 h 45 c A A2 L A1 MAX Number of Pins Pitch Overall Height A .053 .069 1.75 Molded Package Thickness A2 .052 .061 1.55 Standoff A1 .004 .010 0.25 Overall Width E .228 .244 6.20 Molded Package Width E1 .146 .157 3.99 Overall Length D .189 .197 5.00 Chamfer Distance h .010 .020 0.51 Foot Length L .019 .030 0.76 Foot Angle 0 8 8 c Lead Thickness .008 .010 0.25 Lead Width B .013 .020 0.51 Mold Draft Angle Top 0 15 15 Mold Draft Angle Bottom 0 15 15 * Controlling Parameter Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057 Units Dimension Limits n p MIN INCHES* NOM 8 .050 .061 .056 .007 .237 .154 .193 .015 .025 4 .009 .017 12 12 MAX MIN MILLIMETERS NOM 8 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 6.02 3.71 3.91 4.80 4.90 0.25 0.38 0.48 0.62 0 4 0.20 0.23 0.33 0.42 0 12 0 12 DS21696E-page 24 (c) 2006 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 8-Lead Plastic Micro Small Outline Package (MS) (MSOP) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D N E E1 NOTE 1 1 2 e b A2 c A A1 Units Dimension Limits N e A Thickness A2 A1 E Width E1 D L L1 c b L1 MILLIMETERS NOM 8 0.65 BSC -- 0.85 -- 4.90 BSC 3.00 BSC 3.00 BSC 0.60 0.95 REF -- -- -- L MIN MAX Number of Pins Pitch Overall Height Molded Package Standoff Overall Width Molded Package Overall Length Foot Length Footprint Foot Angle Lead Thickness Lead Width -- 0.75 0.00 1.10 0.95 0.15 0.40 0 0.08 0.22 0.80 8 0.23 0.40 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 3. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing No. C04-111, Sept. 8, 2006 (c) 2006 Microchip Technology Inc. DS21696E-page 25 MCP6541/1R/1U/2/3/4 14-Lead Plastic Dual In-line (P) - 300 mil (PDIP) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E1 D 2 n 1 E A A2 c eB A1 B1 B p L MAX Number of Pins Pitch Top to Seating Plane A .140 .170 4.32 Molded Package Thickness A2 .115 .145 3.68 Base to Seating Plane A1 .015 Shoulder to Shoulder Width E .300 .313 .325 8.26 Molded Package Width .240 .250 .260 6.60 E1 Overall Length D .740 .750 .760 19.30 Tip to Seating Plane L .125 .130 .135 3.43 c Lead Thickness .008 .012 .015 0.38 Upper Lead Width B1 .045 .058 .070 1.78 Lower Lead Width B .014 .018 .022 0.56 eB Overall Row Spacing .310 .370 .430 10.92 Mold Draft Angle Top 5 10 15 15 Mold Draft Angle Bottom 5 10 15 15 * Controlling Parameter Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-005 Units Dimension Limits n p MIN INCHES* NOM 14 .100 .155 .130 MAX MIN MILLIMETERS NOM 14 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 18.80 19.05 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10 DS21696E-page 26 (c) 2006 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 14-Lead Plastic Small Outline (SL) - Narrow, 150 mil (SOIC) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E E1 p D 2 B n 1 h 45 c A A2 L A1 MAX Number of Pins Pitch Overall Height A .053 .069 1.75 Molded Package Thickness A2 .052 .061 1.55 Standoff A1 .004 .010 0.25 Overall Width E .228 .244 6.20 Molded Package Width .150 .157 3.99 E1 Overall Length D .337 .347 8.81 Chamfer Distance h .010 .020 0.51 Foot Length L .016 .050 1.27 Foot Angle 0 8 8 c Lead Thickness .008 .010 0.25 Lead Width B .014 .020 0.51 Mold Draft Angle Top 0 15 15 Mold Draft Angle Bottom 0 15 15 * Controlling Parameter Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-065 Revised 7-20-06 Units Dimension Limits n p MIN INCHES* NOM 14 .050 .061 .056 .007 .236 .154 .342 .015 .033 4 .009 .017 12 12 MAX MIN MILLIMETERS NOM 14 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 5.99 3.81 3.90 8.56 8.69 0.25 0.38 0.41 0.84 0 4 0.20 0.23 0.36 0.42 0 12 0 12 (c) 2006 Microchip Technology Inc. DS21696E-page 27 MCP6541/1R/1U/2/3/4 14-Lead Plastic Thin Shrink Small Outline (ST) - 4.4 mm (TSSOP) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E E1 p D 2 n B 1 A c L Units Dimension Limits MIN n p A A2 A1 E E1 D L c B .039 .033 .002 .246 .169 .193 .020 0 .004 .007 INCHES NOM 14 .026 BSC .041 .035 .004 .251 .173 .197 .024 4 .006 .010 12 REF 12 REF A1 MILLIMETERS* MAX MIN NOM 14 0.65 BSC .043 .037 .006 .256 .177 .201 .028 8 .008 .012 1.00 0.85 0.05 6.25 4.30 4.90 0.50 0 0.09 0.19 1.05 0.90 0.10 6.38 4.40 5.00 0.60 4 0.15 0.25 12 REF 12 REF A2 MAX Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Molded Package Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom 1.10 0.95 0.15 6.50 4.50 5.10 0.70 8 0.20 0.30 * Controlling Parameter Notes: Dimensions D and E1 do not include mold fla sh or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side. BSC: Basic Dimension. Theoretically exact value shown without tolerances. See ASME Y14.5M REF: Reference Dimension, usually without tole rance, for information purposes only. See ASME Y14.5M JEDEC Equivalent: MO-153 AB-1 Drawing No. C04-087 Revised: 08-17-05 DS21696E-page 28 (c) 2006 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 APPENDIX A: REVISION HISTORY Revision E (September 2006) The following is the list of modifications: 1. 2. 3. 4. Added MCP6541U pinout for the SOT-23-5 package. Clarified Absolute Maximum Analog Input Voltage and Current Specifications. Added applications writeups on unused comparators. Added disclaimer to package outline drawings. Revision D (May 2006) The following is the list of modifications: 1. 2. 3. 4. 5. 6. Added E-temp parts. Changed VHYST temperature specification to linear and quadratic temperature coefficients. Changed specifications and plots for E-Temp. Added Section 3.0 Pin Descriptions Corrected package marking (See Section 5.1 "Package Marking Information") Added Appendix A: Revision History. Revision C (September 2003) Revision B (November 2002) Revision A (March 2002) * Original Release of this Document. (c) 2006 Microchip Technology Inc. DS21696E-page 29 MCP6541/1R/1U/2/3/4 NOTES: DS21696E-page 30 (c) 2006 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device -X Temperature Range /XX Package Examples: a) MCP6541T-I/LT: Tape and Reel, Industrial Temperature, 5LD SC-70. MCP6541T-I/OT: Tape and Reel, Industrial Temperature, 5LD SOT-23. MCP6541-E/P: Extended Temperature, 8LD PDIP. MCP6541RT-I/OT: Tape and Reel, Industrial Temperature, 5LD SOT23. MCP6541-E/SN: Extended Temperature, 8LD SOIC. MCP6541UT-E/OT:Tape and Reel, Extended Temperature, 5LD SOT23. MCP6542-I/MS: Industrial Temperature, 8LD MSOP. MCP6542T-I/MS: Tape and Reel, Industrial Temperature, 8LD MSOP. MCP6542-I/P: Industrial Temperature, 8LD PDIP. MCP6542-E/SN: Extended Temperature, 8LD SOIC. Industrial Temperature, 8LD SOIC. MCP6543T-I/SN: Tape and Reel, Industrial Temperature, 8LD SOIC. MCP6543-I/P: Industrial Temperature, 8LD PDIP. MCP6543-E/SN: Extended Temperature, 8LD SOIC. b) Device: MCP6541: MCP6541T: MCP6541RT: MCP6541UT: MCP6542: MCP6542T: MCP6543: MCP6543T: MCP6544: MCP6544T: Single Comparator Single Comparator (Tape and Reel) (SC-70, SOT-23, SOIC, MSOP) Single Comparator (Rotated - Tape and Reel) (SOT-23 only) Single Comparator (Tape and Reel) (SOT-23-5 is E-Temp only) Dual Comparator Dual Comparator (Tape and Reel for SOIC and MSOP) Single Comparator with CS Single Comparator with CS (Tape and Reel for SOIC and MSOP) Quad Comparator Quad Comparator (Tape and Reel for SOIC and TSSOP) c) d) e) f) a) b) Temperature Range: I = -40C to +85C E * = -40C to +125C * SC-70-5 E-Temp parts not available at this release of the data sheet. c) d) Package: LT OT MS P SN SL ST = = = = = = = Plastic Package (SC-70), 5-lead Plastic Small Outline Transistor (SOT-23), 5-lead Plastic MSOP, 8-lead Plastic DIP (300 mil Body), 8-lead, 14-lead Plastic SOIC (150 mil Body), 8-lead Plastic SOIC (150 mil Body), 14-lead (MCP6544) Plastic TSSOP (4.4mm Body), 14-lead (MCP6544) a) b) MCP6543-I/SN: c) d) a) MCP6544T-I/SL: b) c) d) Tape and Reel, Industrial Temperature, 14LD SOIC. MCP6544T-E/SL: Tape and Reel, Extended Temperature, 14LD SOIC. MCP6544-I/P: Industrial Temperature, 14LD PDIP. MCP6544T-E/ST: Tape and Reel, Extended Temperature, 14LD TSSOP. (c) 2006 Microchip Technology Inc. DS21696E-page 31 MCP6541/1R/1U/2/3/4 NOTES: DS21696E-page 32 (c) 2006 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." * * Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active Thermistor, Mindi, MiWi, MPASM, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2006, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company's quality system processes and procedures are for its PICmicro(R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. (c) 2006 Microchip Technology Inc. DS21696E-page 33 WORLDWIDE SALES AND SERVICE AMERICAS Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Alpharetta, GA Tel: 770-640-0034 Fax: 770-640-0307 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509 ASIA/PACIFIC Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Habour City, Kowloon Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8528-2100 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Fuzhou Tel: 86-591-8750-3506 Fax: 86-591-8750-3521 China - Hong Kong SAR Tel: 852-2401-1200 Fax: 852-2401-3431 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 China - Shenzhen Tel: 86-755-8203-2660 Fax: 86-755-8203-1760 China - Shunde Tel: 86-757-2839-5507 Fax: 86-757-2839-5571 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 China - Xian Tel: 86-29-8833-7250 Fax: 86-29-8833-7256 ASIA/PACIFIC India - Bangalore Tel: 91-80-4182-8400 Fax: 91-80-4182-8422 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 India - Pune Tel: 91-20-2566-1512 Fax: 91-20-2566-1513 Japan - Yokohama Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Korea - Gumi Tel: 82-54-473-4301 Fax: 82-54-473-4302 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 Malaysia - Penang Tel: 60-4-646-8870 Fax: 60-4-646-5086 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 EUROPE Austria - Wels Tel: 43-7242-2244-3910 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820 08/29/06 DS21696E-page 34 (c) 2006 Microchip Technology Inc. |
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